Japanese chip maker Rapidus plans to manufacture and package chips at a factory that will cost about 5 trillion yen, setting it apart from TSMC, Intel and Samsung.

Rapidus, a foundry startup backed by the Japanese government and several major companies, plans to invest $32 billion (approximately 5 trillion yen) to operate its first cutting-edge fab (semiconductor factory) in Hokkaido in 2027 and enter the global semiconductor market. In addition to manufacturing chips using the 2nm process, Rapidus has also revealed its intention to provide

packaging services for chips produced in the facility.

Rapidus Adds Chip Packaging Services to Plans for $32 Billion 2nm Fab

Japanese chipmaker Rapidus faces logistics hurdles at Hokkaido plant - Nikkei Asia

Rapidus plans to first offer the 2nm process and then the 1.4nm process, which are cutting-edge manufacturing technologies. Rapidus hopes that Japanese and American chip developers will adopt its 2nm manufacturing process, but since there are only a limited number of companies that design chips using cutting-edge processes, IT news site AnnandTech says it is unclear whether Rapidus' business model will be successful.

'We are proud to be a Japanese company,' said Henri Richard, general manager and president of Rapidus Design Solutions LLC , Rapidus' U.S. subsidiary. 'Japan is known for its attention to quality and detail, not speed or flexibility. Rapidus President Atsuyoshi Koike is a unique executive who combines Japanese quality with an American mindset and is focused on building a flexible, speedy company.'

In addition, Richard commented, 'Until recently, research firm IDC predicted the market size of semiconductors below 2nm process to be about $80 billion (about 12.5 trillion yen), but it will be revised to $150 billion (about 23.5 trillion yen) in the near future. With TSMC dominating the rapidly growing cutting-edge semiconductor market and Samsung and Intel aiming to enter, Rapidus said that a small share is enough to succeed.

In addition, Rapidus is reportedly planning to use conventional low-NA (numerical aperture) lithography equipment for the 2nm process, rather than the high-NA lithography equipment that Intel will introduce for the 1.4nm generation. While the low-NA will reduce costs, the EUV exposure process will increase costs and make the production cycle longer than usual.

However, analysts at semiconductor market research firm SemiAnalysis said, 'Even when considering the trade-off of increased costs, using low NA lithography equipment is economically viable.' In fact, TSMC and Samsung have also been quite cautious about introducing high NA lithography equipment, and Rapidus is not the only company using low NA lithography equipment. However, Richard said, 'We may consider a different solution for 1.4nm.'

Rapidus envisions chip manufacturing and packaging in the same fab. Typically, chip packaging is done in a separate facility from chip manufacturing due to technical differences and cost efficiency issues. However, Rapidus plans to significantly reduce the time and risk of transporting wafers to a separate facility and consolidate everything into one.

'We aim to reinvent the way chips are manufactured so that chip design, front-end and back-end processes come together to complete projects quickly, with high quality and high yields. We intend to differentiate ourselves from other companies by having back-end capabilities in our semiconductor fab in Hokkaido,' said Richard.

◆ Forum is currently open
A forum related to this article has been set up on the official GIGAZINE Discord server . Anyone can post freely, so please feel free to comment! If you do not have a Discord account, please refer to the account creation procedure article to create an account!

• Discord | 'Do you think Japanese semiconductor company Rapidus will be able to mass-produce 2nm chips as scheduled?' | GIGAZINE

in Hardware, Posted by log1i_yk