Feb 22, 2024 13:00:00

Arm announces 3rd generation models of data center processor core 'Neoverse' 'Neoverse V3', 'Neoverse N3' and 'Neoverse E3'

On February 21, 2024, Arm announced the 3rd generation models of the Neoverse series of processor cores for data centers, Neoverse V3 , Neoverse N3 , and Neoverse E3 , as well as the compute subsystems CSS V3 and CSS N3 . did.

Neoverse CSS enables high-performance custom silicon - Infrastructure Solutions blog - Arm Community blogs - Arm Community

https://community.arm.com/arm-community-blogs/b/infrastructure-solutions-blog/posts/arm-neoverse-css-v3-simplifies-and-accelerates-custom-silicon-for-cloud-and- ai

Arm Announces Neoverse V3 and N3 CPU Cores: Building Bigger and Moving Faster with CSS

https://www.anandtech.com/show/21270/arm-announces-neoverse-v3-and-n3-cpu-cores

Arm unveils Arm Neoverse CSS V3 chip designs for AI efficiency gains | VentureBeat
https://venturebeat.com/ai/arm-unveils-arm-neoverse-css-v3-chip-designs-for-ai-efficiency-gains/

Arm targets AI performance with latest Neoverse Compute Subs • The Register
https://www.theregister.com/2024/02/21/arm_neoverse_compute/

There are three types of processors announced this time: the high-end chip 'Neoverse V3', the power-efficient 'Neoverse N3', and the highly efficient 'Neoverse E3'. Arm's announcement also introduces the performance overview of ``CSS V3'', which combines Neoverse V3 and subsystem IP ``Arm Neoverse Compute Subsystems (CSS)'', and ``CSS N3'', which combines Neoverse N3 and CSS.

CSS V3 is said to have improved performance per socket by about 50% compared to ' CSS N2 ' released in August 2023.

In addition, CSS V3 has a maximum number of cores of 128 per socket and supports high-speed memory and interfaces such as DDR5, LPDDR5, HBM3, PCIe Gen5, and CXL 3.0.

CSS N3, designed for applications that require high power efficiency, has improved processing performance per core per watt of power consumption by approximately 20% compared to CSS N2.

The number of cores of CSS N3 is 8 to 32 cores per socket, and it is said that it is possible to keep the thermal design power below 40 watts even in the maximum 32-core configuration.

Furthermore, as a result of adopting '

XGBoos ', which optimizes circuit design using gradient boosting, both Neoverse V3 and Neoverse N3 have dramatically improved processing performance in AI data analysis, and compared to Neoverse V2, Neoverse V3 Compared to Neoverse N2, Neoverse N3 achieved a performance improvement of 84% and 196%.

Dermot O'Driscoll, Vice President of Arm's Infrastructure Business Unit, said: 'By analyzing the specific algorithms that are core to our key partners' workloads, we are able to identify the most effective microarchitectural changes that will impact performance. We were able to identify and implement this.'

According to Arm, chipmaker SocioNext plans to use TSMC's 2nm node to produce CSS V3-based chiplets starting in 2025. Arm has also revealed that it is proceeding with the development of further next-generation IP for the Neoverse series.